Field of the Invention
The invention relates to a circuit configuration for filtering and decimating a sequence of component signals for luminance and chrominance for a video signal.
In digital signal processing in television sets, pixels are represented by component signals for luminance and chrominance. In a conventional format, a pair or two samples for the brightness Y is in each case allocated one sample for two color signal components U, V (format Y:U:V=4:2:2).
In the case of picture-in-picture insertion (PIP), for example, a decimation of the original video signal to the picture size to be inserted is required in order to reduce the size of the picture to be inserted. A decimation factor of 2 means that if the luminance and chrominance samples have in each case a first sampling rate, the samples for luminance and chrominance of the decimated video signal are at half the original rate. To avoid aliasing errors in the undersampling, limiting of the bandwidth of the original video signal by means of suitable low-pass filtering is required.